1. Technical Field
Example embodiments relate to a non-volatile memory device including a fin-type channel region and a method of manufacturing the non-volatile memory device.
2. Description of the Related Art
Along with further reductions in size, higher capacity data processing may be required for semiconductor products. Accordingly, increasing the operational speed and integration density of non-volatile memory devices used in semiconductor products may be beneficial. For example, a semiconductor device having a fin-FET structure may have a larger channel surface and, thus, may have increased operational speed. At the same time, the integration density may be increased by reducing the width of the fins of the fin-FET structure.
A fin-FET using a silicon-on-insulator (SOI) substrate may improve a short channel effect. However, SOI substrates may be relatively expensive. Additionally, even when using a SOI substrate, a short channel effect (e.g., drain-induced barrier lowering (DIBL)) may still occur depending on the dielectric properties of the insulator. Thus, attempts have been made to manufacture a fin-FET or a fin memory cell having similar characteristics to a SOI substrate using a bulk semiconductor substrate. Furthermore, as the integration density of a semiconductor device increases, the distance between the fins may be reduced, thus resulting in disturbances during reading operations.